Benefits

Any rate programming
Arbitrary pattern generation (including PRBS and clock patterns)
BERT, eye diagram and analog waveform measurement capabilities
Fully-synthesized integrated jitter injection and noise injection on all lanes
Fully-automated integrated jitter testing on all lanes
Per lane TX amplitude, pre-emphasis, and fine skew control
Per lane RX clock recovery and equalization
Flexible loopback support
State-of-the-art programming environment based on the highly intuitive Python language

The SV5C Personalized SerDes Tester is a highly capable, highly integrated parallel BERT solution that allows for achieving enhanced test coverage and gaining deep insights into multi-channel interface link performance. By simultaneously generating and measuring traffic on 16 lanes and at data rates up to 12.5 Gbps, the SV5C offers a unique opportunity to characterize SerDes links under realistic system-like conditions while offering world class signal integrity and isolation between channels.

Designed from the ground up to address the validation needs of parallel interfaces such as PCI Express Gen 4 and various upcoming MIPI standards, the SV5C is a technological marvel incorporating innovations in the areas of digital signal processing, analog processing, microwave signal propagation, data analytics, thermal design, and many others!

When used with Pinetree, Introspect’s highly versatile software, the SV5C becomes an integral part of a complete high-volume characterization station that consists of a test automation suite, device power supplies, device handlers, and device control probes.