SV7C-PAM3 12-Channel, PAM3 Bit Error Rate Tester
Highly Integrated BERT for GDDR7, USB4, and Other Interfaces
- Parallel: With increasing crosstalk issues, a truly parallel system allows for the most comprehensive “stress test” that is possible.
- Protocol-aware: Train the links and test them using the same product and without requiring special test modes.
- Automated: Scripting capability is ideal for debug tasks, firmware verification, and full‐fledged production screening of devices and system modules.
The SV7C-PAM3 is an ultra-portable bit error rate tester (BERT) for high-speed interfaces that operate with PAM3 signaling. Featuring 12 separate pattern generators with per-pin control over voltage, timing, and jitter, this product is ideal for receiver stress testing activities. Similarly, its native PAM3 error detectors enable loopback testing, long-term bit error rate testing, and PAM3 eye diagram analysis. Coupled with Introspect’s seamless, easy-to-use development environment, Pinetree, this tool enables product engineers with widely varying skill sets to efficiently work with and develop PAM3 products.
Typical Application: Pattern Generators for Stressed Eye Testing
