SV3D-8 Direct Attach SerDes Test Module
The SV3D-8 Direct Attach SerDes Test Module is a compact, highly integrated test solution that mounts directly onto an application or test board, eliminating the need for external cabling. Designed to meet the increasing demand for parallel, multi-site Gbps testing at a low total cost, it offers continuous data rate selection up to 8 Gbps. The module features 32 independent transmitters capable of introducing signal impairments such as sinusoidal and random jitter, TX de-emphasis, and lane-to-lane skew.
In parallel, its 32 independent receivers support per-channel equalization, true parallel bit-error-rate (BER) measurement, and rapid eye-margining control. With built-in power sequencers, clock synthesizers, and automated scripting support, the SV3D-8 provides full-featured, automated testing in a minimal footprint, ideal for space-constrained environments. Communication with ATE systems is facilitated through a standard SPI bus and an optional parallel interface for high-volume data transfers.
- Multi-site, fully parallel test capability with individual pattern and BER control per lane
- Self-contained solution with on-board power sequencers and clock synthesizers
- Automated with built-in scripting capability for test time minimization
- Tiny footprint and minimal I/O requirements
The SV3D-8 Direct Attach SerDes Test Module is highly-integrated tester that mounts directly on an application or test board without requiring cables. It satisfies the growing need for parallel, multi-site Gbps testing methodologies at the lowest possible total cost.
The SV3D-8 provides continuous data rate selection up to 8 Gbps. It features 32 independent transmitters with signal impairments including sinusoidal and random jitter injection, TX de-emphasis and lane-to-lane skew injection, and 32 independent receivers with per-channel equalization, true parallel bit-error-rate measurement and controls for rapid eye-margining measurement. Communication with ATE is handled seamlessly via an SPI bus and via an optional parallel interface for extended data transfers.